Implementation of an Affine-Covariant Feature Detector in Field-Programmable Gate Arrays
نویسندگان
چکیده
This article describes an FPGA-based implementation of the Harris-Affine feature detector introduced by Mikolajczyk and Schmid [1, 2]. The system is implemented on the Transmogrifier-4, a prototyping platform that includes four Altera Stratix S80 FPGAs and NTSC/VGA video interfaces. The system achieves a speed of 90–9000 times the speed of an equivalent software implementation, allowing it to process standard video (640× 480 pixels) at 30 frames per second.
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